Stacked for Scale: The Future of AI Compute, Semiconductors, and Foundational AI

Abstract

The session opened with a policy‑driven keynote by Amitesh Sinha, who outlined the India Semiconductor Mission’s three‑pronged strategy—design, manufacturing, and packaging—and previewed the next phase (ISM 2.0) that will broaden R&D, equipment, chemicals, and scaling initiatives. The floor then shifted to a panel of Indian semiconductor builders who described ambitious road‑maps for GPU design, high‑efficiency power chips, data‑center silicon, and low‑power edge SoCs. The discussion examined India’s “right to win” in the global semiconductor ecosystem, highlighting talent depth, capital needs, supply‑chain bottlenecks, market‑access policies, and the critical role of government‑backed R&D. A short audience Q&A probed memory‑technology bottlenecks, software‑ecosystem challenges, and advice for other emerging economies. The session closed with a joint thank‑you and a call for continued collaboration.

Detailed Summary

Policy Vision

ISM’s three focus areas: Design, Manufacturing, Packaging.
Design: 24 startup/SME projects approved; 14 have already secured VC funding and are moving to the next development stage.
Manufacturing: 10 projects approved – 1 silicon fab, 1 silicon‑carbide fab, and 8 packaging units.
ISM 2.0 (the upcoming phase): will continue the three verticals and add:
- R&D on advanced nodes, silicon photonics, OLED and other emerging technologies.
- Equipment development (tools, components, chemicals, gases).
- Scaling programmes, including curriculum revision to sustain a skilled workforce.

Strategic Priorities

National push for semiconductor scaling across the entire ecosystem.
External investment is essential, especially for design‑stage startups.
Emphasis on high‑performance computing (HPC) platforms: India is building its own boards, cooling systems, and interconnects, and will eventually develop indigenous CPUs/GPUs.
Software strength: leveraging India’s AI talent to create large‑language models (LLMs) and application‑specific AI models.

Key Insight

“The AI stack’s fundamental building blocks are semiconductor chips; we are already creating high‑power compute machines and will soon own the full chip‑design capability.”

Call to Action

Invite venture capital and global partners to accelerate the AI‑first semiconductor ecosystem.

2. Panel Introduction – Setting the Stage

Moderator: Rajan Anandan (Peak XV)

Explained the purpose of the panel: explore what it takes for India to become a global semiconductor leader.
Noted three data points that illustrate India’s rapid rise:
1. From outside top‑100 in digital payments (2015) to 60 % of global real‑time payments (2025).
2. From 2 space‑tech startups (2015) to >300 today.
3. From virtually no AI‑model startups to ≈12 companies building 1‑100 B‑parameter models.
Introduced the four panelists and outlined the 40‑minute discussion format (20 min Q&A with the audience to follow).

3. Founder Presentations

3.1 Agrani Labs – “Building a World‑Class GPU from Scratch”

Speaker: Deemanth Nagaraj (Founder, Agrani Labs)

Team pedigree: 25 years in CPU/GPU design at Intel, AMD, IBM; cumulative 150 years of experience across the founding team.
Mission: design and fabricate a full‑stack GPU in India within the next 10 years, targeting a top‑5 global position.
Talent mobilisation: attracted top engineers, many leaving high‑pay data‑brick roles to join the startup.
Key Challenge: Securing high‑volume supply‑chain access (wafer fabs, memory, packaging) and capital for tape‑out.

Quote: “Building a GPU is second nature for us; the real work is convincing partners and funders that Indian talent can deliver world‑class silicon.”

3.2 C2I Semiconductors – “Power‑Management for AI‑Scale Data Centres”

Speaker: Preetam Tadeparthy (Co‑Founder, C2I Semiconductors)

Origin: Spin‑out from a core team of former Texas Instruments power‑chip engineers.
Problem Statement: AI workloads now demand megawatt‑scale power; classic GPU clusters consume hundreds of kilowatts per rack, with 30‑40 % loss in distribution, conversion, and cooling.
Technical Approach:
1. High‑efficiency voltage conversion (800 V → 800 mV) to minimise conversion loss.
2. Current handling – design chips that can safely conduct ≈2000 A while keeping silicon real‑estate minimal.
3. Reliability – robust designs that survive high current without degradation.
Product Road‑Map: A two‑chip solution slated for April tape‑out, scaling to a 32‑chip power‑management system for a single high‑end GPU (e.g., a “Marvel‑type” accelerator).

Data Point: “A 1‑GW data‑center equates to ~400 k–500 k GPUs; at $40 k p er GP U t ha t i s * *$ 20 bn** of hardware – a huge market for power‑efficient solutions.”

3.3 Marvell – “Enabling the Indian Data‑Center Ecosystem”

Speaker: Navin Bishnoi (Head of India, Marvell Technology)

Business Scope: Full‑stack data‑infrastructure – processors, networking, storage, security, and custom XPU accelerators.
India Operations: Mirrors global Marvell structure: IP development, methodology, software, packaging, plus product and business teams that integrate these blocks for Indian customers.
Strategic Focus:
- Build XPU‑centric solutions (custom accelerators optimized for AI workloads) and the supporting high‑speed interconnects (copper & optical).
- Deliver scale‑up, scale‑out, and scale‑across capabilities for rack‑level to continent‑wide deployments.
Market Outlook: Anticipates 8–9 GW of Indian data‑center capacity within 5–6 years (≈80 bn USD of GPU spend).

Key Insight: “India’s data‑center growth is a catalyst for domestic semiconductor design and manufacturing; Marvell is ready to co‑develop the entire stack locally.”

3.4 Mindgrove Technologies – “Edge‑Centric Low‑Power SoCs for the Indian Market”

Speaker: Shashwath TR (Co‑Founder, Mindgrove Technologies)

Product Focus: High‑performance microcontrollers and low‑power SoCs for edge devices (cameras, smartphones, smart locks, drones, autonomous vehicles).
Team Composition: Predominantly young engineers (average age ~27); the first silicon was taped‑out by a seven‑person team.
Design Philosophy: Emphasises agility, security, and compact form‑factor for devices that handle sensitive data locally.
Market Position: Targeting India first, then scaling globally via the “Global South” ecosystem.

Quote: “We are a marathon, not a sprint – building a sustainable, secure edge platform that can grow with India’s consumer base.”

4. “India’s Right to Win” – Panel Debate

Moderator (Rajan) moved the conversation to a broader assessment of India’s competitive advantage.

4.1 Talent Landscape

Consensus: India possesses a large, world‑class talent pool (~20 % of global semiconductor designers).
Challenge: Retention of top engineers and creation of technology‑leadership roles within Indian firms.

4.2 Capital & Ecosystem

VC Availability: Noted that patient capital is emerging (e.g., Peak XV’s investments), but semiconductor cycles demand longer‑term funding.
Supply‑Chain Constraints:
- Monopolistic fab access (e.g., TSMC, Samsung).
- Memory shortage – HBM dominated by Micron, Samsung, Hynix; lead times are months‑long.
- Equipment & chemicals – heavy dependence on foreign suppliers.
Policy Recommendation: Government should use its “good offices” to allocate strategic memory capacities (e.g., Micron’s HBM for Indian projects) and to facilitate equipment imports.

4.3 Market Access & Data Sovereignty

Projected AI‑related GPU spend: 4 GW in India → ≈$80 bn in the next 4–5 years.
Regulatory levers: “Make‑in‑India” policies, procurement mandates for strategic applications (space, defense), and standard‑setting for consumer electronics (e.g., charger standards).
Global‑South Leadership: Position India as the primary semiconductor supplier for emerging markets.

4.4 R&D and Technology Equity

R&D focus areas highlighted by Amitesh (see Section 5): advanced nodes (7 nm–3 nm), silicon‑photonic interconnects, OLED/display tech, quantum materials, high‑thermal‑conductivity substrates (diamond, SiC).
Industry‑Academia Partnerships: “Industry‑driven research labs” to bridge the gap between fundamental science and productizable IP.

4.5 Open Questions / Points of Contention

Scale‑up vs. Speed‑up: Should India pursue large‑scale fab construction (capital‑intensive) or focus on rapid‑cycle ASIC design leveraging AI‑enabled EDA?
Software Ecosystem: How to break the CUDA dominance and foster a home‑grown accelerator software stack? (raised by a Mindgrove audience question).

5. Government‑Led R&D Priorities (Amitesh’s Follow‑Up)

Node‑Level R&D: Enable 7 nm, 5 nm, and sub‑5 nm capabilities domestically, including equipment development for these processes.
Materials R&D: Focus on diamond substrates, silicon‑carbide, sapphire, and novel high‑thermal‑conductivity materials for power‑dense AI accelerators.
Packaging & Photonics: Develop silicon‑photonic transceivers and high‑speed SERDES (>448 Gb/s) within Indian fabs.
Precision Engineering: Fund precision‑machining and metrology startups to close the “ecosystem gap” that delays tape‑out timelines.
Incentive Structure: Transition from high‑capex subsidies (ISM 1.0) to targeted R&D grants and market‑access mandates as the ecosystem matures (ISM 2.0 → ISM 3.0).

6. Audience Q&A – Highlights

Questioner	Theme	Summary of Answer
Aziz Akram (Uzbekistan Ministry of Economy & Finance)	How should a non‑leader country start in semiconductors?	Amitesh emphasized early government‑industry dialogue, transparent incentive design, and patient capital; highlighted that India’s journey began in 2022 with scheme rollout, and that first‑movers will reap the long‑term ecosystem benefits.
Unnamed attendee (memory‑industry interest)	Why are HBM (high‑bandwidth memory) products limited to three vendors?	Navin explained that HBM requires advanced packaging, thermal management, and tiny process nodes, making it a high‑barrier technology; emerging Chinese initiatives were noted as possible future competitors, but leap‑frog alternatives (e.g., novel memory architectures) were also suggested.
Shashul (Grada.ai founder)	How can software ecosystems (e.g., CUDA) be challenged?	Rajan noted that Agrani is “software‑first” and aims to invert the traditional stack: develop software‑driven hardware that can compete with established CUDA‑centric ecosystems.
Audience member (systems‑integration concern)	Need for system‑level (OEM/ODM) partners in India?	Multiple panelists agreed that complete system integration (board, rack, data‑center) is a missing piece; the government is working on policy frameworks to nurture OEM/ODM capabilities.
Various audience members	Recommendations for policy focus on firmware/middleware layers?	Amitesh confirmed that METI (Ministry of Electronics & IT) is already integrating startups into a full‑stack solution, covering hardware, firmware, middleware, and software to avoid reliance on external ecosystems.

7. Closing Remarks

Amitesh thanked the panelists and audience, reaffirmed the government’s commitment to building a world‑class semiconductor ecosystem, and invited continued collaboration with industry, academia, and investors.
Rajan thanked the founders for their moon‑shot ambitions, highlighted the need for scaling talent and supply‑chain, and encouraged the audience to reach out for partnership opportunities.
The session ended with a round of applause and an invitation to network after the official program.

Key Takeaways

Policy Backbone – ISM 1.0 delivered design, fab, and packaging pilots; ISM 2.0 will expand R&D, equipment, chemicals, and scaling incentives.
Design Momentum – 24 startups funded, 14 already VC‑backed; a pipeline of 10+ fab/packaging units slated for commercial operation by 2030.
Talent Advantage – India hosts roughly 20 % of the world’s semiconductor designers, but retention and leadership roles remain critical.
Supply‑Chain Bottlenecks – Dependence on foreign fabs and memory suppliers; government urged to negotiate strategic allocations (e.g., Micron HBM).
Market Opportunity – Expected 4 GW of AI‑focused GPU deployment in India (≈$80 bn) within the next 4‑5 years, positioning India as a global‑South hub.
Startup Visions –
- Agrani Labs aims for a world‑class GPU in 10 years, leveraging veteran talent.
- C2I Semiconductors targets high‑efficiency power‑management for AI data‑centers, with a tape‑out planned for April.
- Marvell provides full‑stack data‑center silicon (processors, XPU, networking) tailored for the Indian market.
- Mindgrove builds low‑power edge SoCs for secure consumer devices, adopting a “India‑first” growth strategy.
R&D Priorities – Advanced nodes (7 nm–3 nm), silicon photonics, high‑thermal‑conductivity substrates, and precision engineering are earmarked for government‑backed projects.
Software Ecosystem – To compete globally, India must develop native AI accelerator stacks that are not dependent on CUDA‑centric tooling.
Systems Integration Gap – A coordinated policy effort is needed to nurture OEM/ODM partners that can assemble complete hardware‑software solutions for both data‑center and edge markets.

These points collectively illustrate how India is positioning itself to own the full AI‑compute stack, from foundational silicon to applications, while navigating global supply constraints and leveraging its talent depth.

See Also:

India AI Impact Summit 2026

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